Non-volatile semiconductor memories, such as a split gate flash memory, sometimes use a stacked floating gate structure, in which electrons are induced into a floating gate of a memory cell to be programmed by biasing a control gate and grounding a body region of a substrate on which the memory cell is formed.
An oxide-nitride-oxide (ONO) stack may be used as either a charge storing layer, as in silicon-oxide-nitride-oxide-silicon (SONOS) transistor, or as an isolation layer between the floating gate and control gate, as in a split gate flash memory.
FIG. 1 is a partial cross-sectional view of a structure for a semiconductor device 100 having a SONOS gate stack or structure 102. The structure 100 includes a conventional ONO stack 104 formed over a surface 106 of a silicon substrate 108. The device 100 typically further includes one or more diffusion regions 110, such as source and drain regions, aligned to the gate stack and separated by a channel region 112. The SONOS structure 102 includes a polysilicon gate layer 114 formed upon and in contact with the ONO stack 104. The poly gate 114 is separated or electrically isolated from the substrate 108 by the ONO stack 104. The ONO stack 104 generally includes a lower (tunnel) oxide layer 116, a nitride or oxynitride layer 118 which serves as a charge storing or memory layer for the device 100, and a top oxide layer 120 overlying the nitride or oxynitride layer 118.
One problem with this conventional SONOS structure 102 is the poor data retention of the nitride or oxynitride layer 118 that limits the device 100 lifetime and/or its use in several applications due to leakage current through the layer. Another problem with conventional SONOS structures 102 is that the stoichiometry of the layer 118 is non-uniform across the thickness of the layer. In particular, the layer 118 is conventionally formed or deposited in a single step using a single process gas mixture and fixed or constant processing conditions in an attempt to provide a homogeneous layer having a high nitrogen and high oxygen concentration across the thickness of the relatively thick layer. However, this may result in nitrogen, oxygen and silicon concentrations that vary throughout the conventional layer 118. Consequently, the charge storage characteristics, and in particular programming and erase speed and data retention of a memory device 100 made with the ONO stack 104, are adversely effected.
FIG. 2-5 illustrate charge retention and migration in a conventional SONOS structure such as the one illustrated in FIG. 1. Charge traps are distributed through the nitride layer 118. The distribution of traps is uniform under ideal stoichiometric conditions (FIG. 2), but typically the distribution would not be so ideally uniform. When an ERASE (FIG. 3) is performed, holes migrate toward the blocking oxide 120. Electron charge accumulates at the layer boundaries after programming (FIG. 4). This stored charge distribution can lead to significant leakage due to tunneling at the nitride boundaries, for example by the process illustrated in the energy diagram FIG. 5, in which stored charge transitions among trapped states (e.g. ETA, ETD) to cause leakage.
Thus there is an ongoing need for a memory device that exhibits improved data retention and improved stoichiometry.